Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 123

Table 2-1. MPC885 Internal Memory Map (IMMR[14–15]=00) (continued)
Offset
2
86C I2COM—I
86D–86F Reserved
2
870 I2CER—I
871–873 Reserved
2
874 I2CMR—I
875–8FF Reserved
900–903 Reserved
904 SDAR—SDMA address register
908 SDSR—SDMA status register
909–90B Reserved
90C SDMR—SDMA mask register
90D–90F Reserved
910 IDSR1—IDMA1 status register
911–913 Reserved
914 IDMR1—IDMA1 mask register
915–917 Reserved
918 IDSR2—IDMA2 status register
919–91B Reserved
91C IDMR2—IDMA2 mask register
91D–92F Reserved
930 CIVR—CPM interrupt vector register
932–93F Reserved
940 CICR—CPM interrupt configuration register
944 CIPR—CPM interrupt pending register
948 CIMR—CPM interrupt mask register
94C CISR—CPM in-service register
950 PADIR—Port A data direction register
952 PAPAR—Port A pin assignment register
954 PAODR—Port A open drain register
Freescale Semiconductor
Name
C command register
C event register
C mask register
Communications Processor Module Interrupt Control
Input/Output Port
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Size
8 bits
3 bytes
8 bits
3 bytes
8 bits
139 bytes
DMA
4 bytes
32 bits
8 bits
3 bytes
8 bits
3 bytes
8 bits
3 bytes
8 bits
3 bytes
8 bits
3 bytes
8 bits
19 bytes
16 bits
14 bytes
32 bits
32 bits
32 bits
32 bits
16 bits
16 bits
16 bits
Memory Map
Section/Page
32.4.5/32-8
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32.4.4/32-7
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32.4.4/32-7
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19.2.4/19-6
19.2.2/19-5
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19.2.3/19-5
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19.3.3.2/19-9
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19.3.3.3/19-9
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19.3.3.2/19-9
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19.3.3.3/19-9
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35.5.5/35-9
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35.5.1/35-6
35.5.2/35-8
35.5.3/35-9
35.5.4/35-9
34.2.1.3/34-4
34.2.1.4/34-5
34.2.1.1/34-3
2-5