Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 695

10. Write MRBLR with the maximum number of bytes per Rx buffer. For this case, assume 16 bytes,
so MRBLR = 0x0010.
11. Write MAX_IDL with 0x0000 in the parameter RAM to disable the maximum idle functionality
for this example.
12. Set BRKCR to 0x0001 so
13. Clear PAREC, FRMEC, NOSEC, and BRKEC in parameter RAM.
14. Clear UADDR1 and UADDR2. They are not used.
15. Clear TOSEQ. It is not used.
16. Write CHARACTER1–8 with 0x8000. They are not used.
17. Write RCCM with 0xC0FF. It is not used.
18. Initialize the RxBD. Assume the Rx buffer is at 0x0000_1000 in main memory. Write 0xB000 to
the RxBD[Status and Control], 0x0000 to RxBD[Data Length] (optional), and 0x0000_1000 to
RxBD[Buffer Pointer].
19. Initialize the TxBD. Assume the buffer is at 0x0000_2000 in main memory and contains sixteen
8-bit characters. Write 0xB000 to the TxBD[Status and Control], 0x0010 to TxBD[Data Length],
and 0x00002000 to TxBD[Buffer Pointer].
20. Write 0xFFFF to SCCE2 to clear any previous events.
21. Write 0x0003 to SCCM2 to allow the TX and RX interrupts.
22. Write 0x2000_0000 to the CPM interrupt mask register (CIMR) to allow SCC2 to generate a
system interrupt. The CICR should also be initialized.
23. Write 0x0000_0020 to GSMR_H2 to configure a small Rx FIFO width.
24. Write 0x0002_8004 to GSMR_L2 to configure 16× sampling for transmit and receive, CTS and
CD to automatically control transmission and reception (DIAG bits), and the SCC for UART mode.
Notice that the transmitter (ENT) and receiver (ENR) have not been enabled yet.
25. Set PSMR2 to 0xB000 to configure automatic flow control using CTS, 8-bit characters, no parity,
1 stop bit, and asynchronous SCC UART operation.
26. Write 0x0002_8034 to GSMR_L2 to enable the transmitter and receiver. This ensures that ENT
and ENR are enabled last.
Note that after 16 bytes are sent, the transmit buffer is closed. Additionally, the receive buffer is closed
after 16 bytes are received. Data received after 16 bytes causes a busy (out-of-buffers) condition because
only one RxBD is prepared.
22.22 S-Records Loader Application
This section describes a downloading application that uses an SCC UART controller. The application
performs S-record downloads and uploads between a host computer and an intelligent peripheral through
a serial asynchronous line. S-records are strings of ASCII characters that begin with 'S' and end in an
end-of-line character. This characteristic is used to impose a message structure on the communication
between the devices. For flow control, each device can transmit XON and XOFF characters, which are not
part of the program being uploaded or downloaded.
Freescale Semiconductor
commands send only one break character.
STOP TRANSMIT
MPC885 PowerQUICC Family Reference Manual, Rev. 2
SCC UART Mode
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