Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 616

Serial Interface
SI RAM Address:
(32-Bit Entries)
127
256
383
20.2.3.4 SI RAM Dynamic Changes
The routing of a TDM channel can be changed while the SCCs and SMCs remain connected to the TSA.
Enabling dynamic changes divides the SI RAM into current-route and work-space shadow areas.
Once the current-route RAM is programmed, the TDM channels can be enabled and SI operation begun.
New routing information can then be programmed into the shadow RAM. Setting the channels'
change-shadow-RAM bits, SICMR[CSRRx, CSRTx], in the SI command register tells the SI to activate
the shadow RAM (deactivating the current-route RAM) when the next frame sync arrives. The SI signals
the user by clearing SICMR[CSRRx, CSRTx] when the swap takes effect. These steps can be repeated with
the former current-route RAM always becoming the new shadow RAM and vice versa.
When using only one channel (TDMa) with dynamic changes, as in
RAM byte addresses are as follows.
• 0–127 Rxa route
• 256–383 Txa route
The shadow RAMs are at addresses:
• 128–255 Rxa route
• 384–511 Txa route
When using both TDMs with dynamic changes, as in
addresses are as follows:
• 0–63 Rxa route
• 128–191 Rxb route
• 256–319 Txa route
• 384–447 Txb route
The shadow RAMs are at addresses:
• 64–127 Rxa route
• 192–255 Rxb route
• 320–383 Txa route
20-10
RDM = 10
Two Channels with Independent Rx and Tx Route
Framing Signals
0
L1RCLKa
32 Entries
L1RSYNCa
Rxa
Route
L1TCLKa
32 Entries
L1TSYNCa
Txa
Route
Figure 20-6. SI RAM—Two TDMs with Static Frames
MPC885 PowerQUICC Family Reference Manual, Rev. 2
128
32 Entries
Rxb
Route
255
384
32 Entries
Txb
Route
511
Figure 20-7, the initial current-route
Figure 20-7, the initial current-route RAM byte
Framing Signals
L1RCLKb
L1RSYNCb
L1TCLKb
L1TSYNCb
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