Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 558

Powerquicc family

Table of Contents

Communications Processor Module and CPM Timers

shows a possible MPC885 configuration for a multiprotocol application that supports various

communications links and protocols.

CPM General-Purpose Timers

The CPM has four identical 16-bit general-purpose timers that can be cascaded into two 32-bit timers. Note

that the CPM general-purpose timers are separate and distinct from the RISC timer tables described in

Section 18.8, "The RISC Timer Table."

Timer mode register (TMR)

Timer capture register (TCR)

Timer counter (TCN)

Timer reference register (TRR)

Timer event register (TER)

Timer global configuration register (TGCR).

Communications

Figure 17-2. MPC885 Application Design Example

Each timer consists of the following:

MPC885 PowerQUICC Family Reference Manual, Rev. 2

16- or 32-Bit

(Parity Optional)

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