Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 682

SCC UART Mode
0 1
Field —
Reset
R/W
Addr
Table 22-5 describes TOSEQ fields.
Bit Name
0–1 — Reserved, should be cleared.
2 REA Ready. Set when the character is ready for transmission. Remains 1 while the character is being
sent. The CP clears this bit after transmission.
3 I Interrupt. If this bit is set, transmission completion is flagged in the event register (SCCE[TX] is
set), triggering a maskable interrupt to the core.
4 CT Clear-to-send lost. Operates only if the SCC monitors CTS (GSMR_L[DIAG]). The CP sets this
bit if CTS negates when the TOSEQ character is sent. If CTS negates and the TOSEQ character
is sent during a buffer transmission, the TxBD[CT] status bit is also set.
5–6 — Reserved, should be cleared.
7 A Address. Setting this bit indicates an address character for multidrop mode.
8–15 CHARSEND Character send. Contains the character to be sent. Any 5- to 8-bit character value can be sent
in accordance with the UART configuration. The character should be placed in the lsbs of
CHARSEND. This value can be changed only while REA = 0.
22.12 Sending a Break (Transmitter)
A break is an all-zeros character with no stop bit that is sent by issuing a
SCC finishes transmitting outstanding data, sends a programmable number of break characters
(determined by BRKCR), and reverts to idle or sends data if a
before completion. When the break code is complete, the transmitter sends at least one high bit before
sending more data, to guarantee recognition of a valid start bit. Because break characters do not preempt
characters in the transmit FIFO, they may not be sent for four (SCC2–SCC4) character times. To reduce
this latency, set GSMR_H[TFL] to decrease the FIFO size to one character before enabling the transmitter.
22.13 Sending a Preamble (Transmitter)
Sending a preamble sequence of consecutive ones ensures that a line is idle before sending a message. If
the preamble bit TxBD[P] is set, the SCC sends a preamble sequence (idle character) before sending the
buffer. For example, for 8 data bits, no parity, 1 stop bit, and 1 start bit, a preamble of 10 ones is sent before
the first character in the buffer.
22-10
2 3 4 5
REA I CT —
0000_0000_0000_0000
Figure 22-4. Transmit Out-of-Sequence Register (TOSEQ)
Table 22-5. TOSEQ Field Descriptions
MPC885 PowerQUICC Family Reference Manual, Rev. 2
6 7 8
A
R/W
SCC base + 0x4E
Description
RESTART TRANSMIT
CHARSEND
command. The
STOP TRANSMIT
command is given
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