Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 833

30.3 Configuring the SPI Controller
The SPI can be programmed to work in a single- or multiple-master environment. This section describes
SPI master and slave operation in a single-master configuration and then discusses the multi-master
environment.
SPI transmission and reception will always be enabled simultaneously. If the transmit or receive function
is not needed, the user can point the associated channel of a non-ready TxBD or RxBD, and simply ignore
the resultant Tx underrun or Rx busy errors.
30.3.1 The SPI as a Master Device
In master mode, the SPI sends a message to the slave peripheral, which sends back a simultaneous reply.
A single master MPC885 with multiple slaves can use general-purpose parallel I/O signals to selectively
enable slaves, as shown in
the master's SPISEL input can be forced inactive by selecting port B[31] for general-purpose I/O
(PBPAR[DD31] = 0).
To start exchanging data, the core writes the data to be sent into a buffer, configures a TxBD with TxBD[R]
set, and configures one or more RxBDs. The core then sets SPCOM[STR] in the SPI command register to
start sending data, which starts once the SDMA channel loads the Tx FIFO with data.
Freescale Semiconductor
Figure 30-2. To eliminate the multimaster error in a single-master environment,
MPC885
SPIMOSI
SPIMISO
SPICLK
Master SPI
The SPISEL
decoder can be
either internal or
external logic.
Figure 30-2. Single-Master/Multi-Slave Configuration
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Serial Peripheral Interface (SPI)
Slave 0
SPIMOSI
SPIMISO
SPICLK
SPISEL
Slave 1
SPIMOSI
SPIMISO
SPICLK
SPISEL
Slave 2
SPIMOSI
SPIMISO
SPICLK
SPISEL
30-3