Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 860

Universal Serial Bus (USB)
Address Name
USB Base + 00 EP0PTR
USB Base + 02 EP1PTR
USB Base + 04 EP2PTR
USB Base + 06 EP3PTR
USB Base + 08 RSTATE
USB Base + 0C RPTR
USB Base + 10 FRAME_N
USB Base + 12 RBCNT
USB Base + 14 RTEMP
USB Base + 18 RXUSB_Data
USB Base + 1C RXUPTR
1
The items in boldface should be initialized by the user before the USB controller is enabled; other values are
initialized by the CP.
Once initialized, the parameter RAM values do not normally need to be accessed by user software. They
should only be modified when no USB activity is in progress.
Endpoint Parameter Block Pointer (EP x PTR)
31.9
The endpoint parameter block pointers (EPxPTR) delineate an endpoint's parameter block in the dual-port
RAM. The parameter block can be allocated to any address that is divisible by 32. The format of the
endpoint pointer registers (EPxPTR) is shown in
0
Field
R/W
Reset
Addr
31-12
Figure 31-7. USB Parameter RAM Memory Map
1
Width
Half Word Endpoint pointer registers 0–3. The endpoint parameter block pointers
are index pointers to each endpoint's parameter block. Parameter
Half Word
blocks can be allocated to any address divisible by 32 in the dual port
RAM. See
Half Word
shown in
Half Word
Note: When USB host mode is set EP0PTR must be used for the host
endpoint.
Word Receive internal state. Reserved for CP use only. Should be cleared
before enabling the USB controller.
Word Receive internal data pointer. Updated by the SDMA channels to show
the next address in the buffer to be accessed.
Half Word Frame number. See
Note: The definition of this parameter is different for host mode and
function mode.
Half Word Receive internal byte count. A down-count value that is initialized with
the MRBLR value and decremented with every byte written by the
SDMA channels.
Word Receive temp. Reserved for CP use only.
Word Rx Data temp
Half Word Rx microcode return address temp
Endpoint Index Pointer
0000_0000_0000_0000
USB base + 0x00 (EP0PTR), 0x02 (EP1PTR), 0x04 (EP2PTR), 0x06 (EP3PTR)
Figure 31-8. Endpoint Pointer Registers (EP x PTR)
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Description
Figure 31-8. The map of the endpoint parameter block is
Table 31-4
Figure 31-9.
Figure 31-8.
10
R/W
11 15
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