Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 105

The MPC885 block diagram is shown in
Embedded
MPC8xx
Processor
Load/Store
Core
Fast Ethernet
Controller
DMAs
FIFOs
10/100
Base-T
Media Access
Control
MII
Freescale Semiconductor
Figure 1-2.
16-Kbyte
Instruction
Instruction Cache
Bus
Instruction MMU
32-Entry ITLB
8-Kbyte
Data Cache
Bus
Data MMU
32-Entry DTLB
4
Parallel I/O
Timers
4 Baud Rate
Generators
Parallel Interface Port
Timers
and UTOPIA
SCC1 SCC1 SCC2 SCC2 SCC3
Time Slot Assigner
Figure 1-1. MPC866P Block Diagram
MPC885 PowerQUICC Family Reference Manual, Rev. 2
System Interface Unit (SIU)
Unified Memory Controller
Bus
Internal
Bus Interface
Unit
System Functions
PCMCIA-ATA Interface
Interrupt 8-Kbyte
Controllers Dual-Port RAM
32-Bit RISC Controller
and Program
ROM
SCC4 SMC1 SMC1 SMC2 SMC2
Serial Interface Serial Interface
MPC885 Overview
External
Bus Interface
Unit
16 Virtual
Serial
and
2
Independent
DMA
Channels
2 2
SPI SPI I I C C
1-7