Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 983

Offset from
Bits
TBD_PTR
0x00 13
(cont.)
14
15
0x02 —
0x04 — Transmit data
buffer pointer
Freescale Semiconductor
Table 37-2. ATM TxBD Field Descriptions (continued)
Name
ICNG Invert CNG (AAL5 only). Valid only when the current BD is the first BD of an
AAL5 frame. The ICNG mechanism allows the dynamic modification of the CNG
bit in the channel's ATM cell header per frame. Setting ICNG instructs the CP to
invert (flip) the middle bit of the PTI (congestion indication) in TCT[CHEAD]. The
change takes effect immediately (starting from the first cell of this frame).
TxBD[ICNG] is cleared by the CP when the buffer is closed.
0 Do not invert the CNG bit in TCT[CHEAD].
1 Invert the CNG bit in TCT[CHEAD].
Note that for cases in which the mechanisms conflict, the ICNG mechanism is
applied after the RH mechanism.
RH Replace header (AAL5 only). Valid only when the current BD is the first BD of
an AAL5 frame. The RH mechanism allows the dynamic modification of the
channel's ATM cell header per frame. Setting RH instructs the CP to copy the
contents of the TxBD[HEADER] field into TCT[CHEAD], and then clear
TxBD[HEADER]. The header replacement takes effect immediately (starting
from the first cell of this frame). TxBD[RH] is cleared by the CP when the buffer
is closed.
When the RH bit is set, the CPCS-UU and CPI field in the TxBD is not available
because the 16 bits are used as the lower order half of the HEADER field. The
transmitter sends a dummy field of all zeros for the CPCS-UU and CPI field.
The RH mechanism can be used to implement a global AAL5 queue for different
VC/VP. It can also be used for frame relay to ATM CLP and EFCI interoperability.
0 Do not replace TCT[CHEAD].
1 Copy TxBD[HEADER] into TCT[CHEAD], and then clear TxBD[HEADER].
ICLP Invert CLP (AAL5 only). Valid only when the current BD is the first BD of an
AAL5 frame. The ICLP mechanism allows the dynamic modification of the CLP
bit in the channel's ATM cell header per frame. Setting ICLP instructs the CP to
invert (flip) the CLP bit in TCT[CHEAD]. The change takes effect immediately
(starting from the first cell of this frame). TxBD[ICLP] is cleared by the CP when
the buffer is closed.
0 Do not invert the CLP bit in TCT[CHEAD].
1 Invert the CLP bit in TCT[CHEAD].
Note that for cases in which the mechanisms conflict, the ICLP mechanism is
applied after the RH mechanism.
Data length Specifies the number of octets the ATM controller sends from this BD's data
buffer. The value of data length should follow the guidelines in
"AAL5 Buffers,"
not modified by the CP.
Contains the address of the associated data buffer. The buffer may reside in
either internal or external memory. This value is not modified by the CP.
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Buffer Descriptors and Connection Tables
Description
or Section 37.1.2, "AAL0 Buffers,"
Section 37.1.1,
as appropriate. This value is
37-9