Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 576

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Communications Processor
Command
Restart transmission. After
RESTART TX
begins polling the R bit of the current BD.
Closes the current RxBD in mid-reception; reception continues using the next available BD. Use
CLOSE RX BD
CLOSE RX BD
Initialize IDMA transfers. Initializes the IDMA internal CP state to the user-defined reset value.
INIT IDMA
Stop IDMA transfers. The CP terminates current IDMA transfers.
STOP IDMA
Used to activate, deactivate, or reconfigure the 16 timers of the RISC timer table.
SET TIMER
Sets a hash table bit for the Ethernet logical group address recognition function.
SET GROUP
ADDRESS
GCI receiver sends an abort request.
GCI ABORT
REQUEST
Performs the GCI timeout function.
GCI TIMEOUT
Used in BISYNC mode to reset the block check sequence calculation.
RESET BCS
See
Section 39.4, "Port-to-Port (PTP) Switching."
ATM
COMMANDS
USB command code. The specific USB commands are described in
USB COMMAND
Commands."
U
Undefined. Reserved for use by Freescale-supplied RAM microcode packages.
18.6.4.1
CP Command Examples
To completely reset the CPM, write 0x8001 to the CPCR. After the FLG bit has cleared, setup of the CPM
can continue. To execute
command is executing, the CPCR returns a 0x0341 value; after executing, it returns 0x0340.
18.6.4.2
CP Command Execution Latency
The worst-case command execution latency for the CP is 500 clocks, while the typical command execution
latency is about 40 clocks.
18.7
Dual-Port RAM
The CPM has 8 Kbytes of static RAM configured as dual-port memory, shown in
The entire dual-port RAM should be cleared as the first step in system
initialization. This step should be followed by issuing a CPM reset using the
CPCR. Only after these two steps should the dual-port RAM be
programmed for specific CPM functions.
18-10
Table 18-8. CP Commands (continued)
or
STOP TX
to access the data buffer without waiting for the SCC to finish filling it.
on SCC2, for example, write 0x0341 to the CPCR. While the
ENTER HUNT MODE
NOTE
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Description
,
GRACEFUL STOP TX
RESTART TX
starts the transmitter, which
Section 31.13, "USB CP
Figure
18-6.
Freescale Semiconductor

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