Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 551

italics Italics indicate variable command parameters, for example, bcctrx.
Book titles in text are set in italics.
0x0 Prefix to denote hexadecimal number
0b0 Prefix to denote binary number
rA, rB Instruction syntax used to identify a source GPR
rD Instruction syntax used to identify a destination GPR
REG[FIELD] Abbreviations or acronyms for registers or buffer descriptors are shown in
uppercase text. Specific bits, fields, or numerical ranges appear in brackets. For
example, MSR[LE] refers to the little-endian mode enable bit in the machine state
register.
x In certain contexts, such as in a signal encoding or a bit field, indicates a don't
care.
n Indicates an undefined numerical value
¬ NOT logical operator
& AND logical operator
| OR logical operator
Acronyms and Abbreviations
Table V-1 contains acronyms and abbreviations used in this document. Note that the meanings for some
acronyms (such as SDR1 and DSISR) are historical, and the words for which an acronym stands may not
be intuitively obvious.
Term
ALU Arithmetic logic unit
ATM Asynchronous transfer mode
BD Buffer descriptor
BIST Built-in self test
CEPT Conference des administrations Europeanes des Postes et Telecommunications (European
Conference of Postal and Telecommunications Administrations).
C/I Condition/indication channel used in the GCI protocol
CP Communications processor
CPM Communications processor module
DMA Direct memory access
DPLL Digital phase-locked loop
DRAM Dynamic random access memory
DSISR Register used for determining the source of a DSI exception
Freescale Semiconductor
Table V-1. Acronyms and Abbreviated Terms
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Meaning
V-3