Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 718

SCC HDLC Mode
To program the general SCC mode register (GSMR), set the bits as described below:
• Set MODE to HDLC mode (0b0000).
• Configure CTSS to 1 and all other bits to zero or default.
• Configure the DIAG bits for normal operation (0b00).
• Configure RDCR and TDCR for 1× clock (0b00).
• Configure TENC and RENC for NRZ (0b000).
• Clear RTSM to send idles between frames.
• Set GSMR_L[ENT, ENR] as the last step to begin operation.
23.14.6.2 HDLC Bus Controller Programming Example
Except for the above discussion in
Protocol," use the example in
23-22
Section 23.14.6.1, "Programming GSMR and PSMR for the HDLC Bus
Section 23.13.1, "SCC HDLC Programming Example #1."
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Freescale Semiconductor