Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 869

31.11.7 USB Status Register (USBS)
The USB status register, described in
user to monitor the real-time status condition on the USB lines.
Field
Reset
R/W
Addr
Table 31-13 describes USBS field.
Bit Name
0–6 —
7 IDLE
31.12 USB Buffer Descriptor Ring
The data associated with the USB channel is stored in buffers that are referenced by BDs organized in BD
rings located in the dual-port RAM (refer to
as those used by the SCCs and SMCs.
There are four separate transmit BD rings and four separate receive BD rings, one for each endpoint. The
BD ring allows the user to define buffers for transmission and buffers for reception. Each BD ring forms
a circular queue. The CP confirms reception and transmission or indicates error conditions using the BDs
to inform the processor that the buffers have been serviced.
The buffers may reside in either external memory or internal memory.
Freescale Semiconductor
Figure 31-17
0 1 2
Figure 31-17. USB Status Register (USBS)
Table 31-13. USBS Fields
Reserved
Idle status. IDLE is set when an idle condition is detected on the USB lines, it is cleared
when the bus is not idle.
Figure
MPC885 PowerQUICC Family Reference Manual, Rev. 2
and Table 31-13, is a read-only register that allows the
3 4 5
—
0000_0000
R
0xA17
Description
31-18). These rings have the same basic configuration
Universal Serial Bus (USB)
6 7
IDLE
31-21