Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 632

Serial Interface
0 1
Field —
Reset
R/W
Addr
16 17
Field —
Reset
R/W
Addr
This register is affected by HRESET and SRESET.
Bits Name
0–1, 8–9, —
16–17, 24–25
2, 10, 18, 26 VR x , VT x Valid if set. Knowing whether an entry is valid (active) helps when the PTR value is zero.
3-7, 11–15, R x PTR,
T x PTR
19–23, 27–31
Table 20-10 describes the pointer values as affected by SIGMR[RDM].
RDM
00 RaPTR/TaPTR point to the first 32 entries and RbPTR/TbPTR point to the second 32 entries.
RaPTR/RbPTR and TaPTR/TbPTR point to the active Rx and Tx entries, respectively. When the SI services
entries 1–32, RaPTR/TaPTR is incremented and RbPTR/TbPTR is continuously cleared. Conversely, when the
SI services entries 33–64, RaPTR/TaPTR is continuously cleared and RbPTR/TbPTR is incremented.
01 For the receiver, whether RaPTR or RbPTR is used depends on which portion of the SI Rx RAM is active (V-bit
set). Whether TaPTR or TbPTR is used depends on which portion of the Tx RAM is active.
• If VRa = 1, RaPTR points to the active Rxa entry. The Rx address block is 0–127; SISTR[CRORa] = 0.
• If VRb = 1, RbPTR points to the active Rxa entry. The Rx address block is 128–255; SISTR[CRORa] = 1.
• If VTa = 1, TaPTR points to the active Txa entry. The Tx address block is 256–383; SISTR[CROTa] = 0.
• If VTb = 1, TbPTR points to the active Txa entry. The Tx address block is 384–511; SISTR[CROTa] = 1.
20-26
2 3
VTb TbPTR
18 19
VRb RbPTR
Figure 20-23. SI RAM Pointer Register (SIRP)
Table 20-9. SIRP Field Descriptions
Reserved, should be cleared.
The V bits eliminate having to read both SIRP and SISTR.
Transmit/receive SI RAM entry pointers. Incremented by one for each entry processed.
These 5-bit pointers' values range from 0–31, corresponding to 32 SI RAM entries,
although the entire range may not be used. For instance, if SIRAM[LST] is set in the fifth
entry, the pointer reflects values 0–4. When the SI processes the fifth, the pointer returns
to 0. Pointer values are described in
Table 20-10. SIRP Pointer Values
MPC885 PowerQUICC Family Reference Manual, Rev. 2
7 8 9 10
— VTa
0
R
0XAF0
23 24 25 26
— VRa
0
R
0xAF2
Table 20-9 describes SIRP fields.
Description
Table 20-10, and are based on SIGMR[RDM].
Configuration
11 15
TaPTR
27 31
RaPTR
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