Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 132

Memory Map
Table 2-1. MPC885 Internal Memory Map (IMMR[14–15]=00) (continued)
Offset
1ECC R2_BOUND
1ED0 R2_FSTART
1ED4–1EE3 Reserved
1EE4 X2_WMRK
1EE8 Reserved
1EEC X2_FSTART
1EF0–1F33 Reserved
1F34 FUN_CODE2
1F38–1F43 Reserved
1F44 R2_CNTRL
1F48 R2_HASH
1F4C–1F83 Reserved
1F84 X2_CNTRL
1F88–1FFF Reserved
2000–2FFF Dual-port system RAM
3000–3BFF Dual-port system RAM expansion
3C00–3FFF PRAM—Dual-port parameter RAM
Table 2-2. Security Engine Memory Map (IMMR[14–15]=10)
SEC Lite
SEC Lite Address
00000-01007 Reserved
01008 Controller
01010 Controller
01018 Controller
01020 Controller
01028–0102F Reserved
01030 Controller
01038 Controller
01040–02007 Reserved
02008 Channel
2-14
Name
Dual-Port RAM (DPRAM)
Description
Module
Interrupt Mask
Interrupt Status
Interrupt Clear
Identification
Master Control
Master TEA Address
Config Register
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Size Section/Page
32 bits 45.3.2.15/45-25
32 bits 45.3.2.16/45-26
16 bytes
32 bits 45.3.2.17/45-27
32 bits
32 bits 45.3.2.18/45-28
68 bytes
32 bits 45.3.2.19/45-29
12 bytes
32 bits 45.3.2.20/45-29
32 bits 45.3.2.21/45-30
56 bytes
32 bits 45.3.2.22/45-31
120 bytes
4,096 bytes 18.7.1/18-12
3,072 bytes 18.7.1/18-12
1,024 bytes 18.7.3/18-13
1
Size Section/Page
4104 bytes
64 bits
64 bits
64 bits
64 bits
8 bytes
64 bits
64 bits
4040 bytes
64 bits
Freescale Semiconductor
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