Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 499

Memory Controller
CS1
DRAM
BS[0:3]
Bank
GPL_A5
Multiplexer
BADDR[28:30]
A[0:31]
D[0:31]
R/W
TS
BURST
MPC885 External
TA
Master
TSIZ[0:1]
BI
BR
BG
BB
Figure 15-49. Synchronous External Master Interconnect Example
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Freescale Semiconductor 15-59