Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 579

18.7.2 The Buffer Descriptor (BD)
The USB, SCCs, SMCs, SPI, IDMA, PIP, and I
buffers. BDs can be placed in any unused area of the dual-port RAM.
structure common to these controllers.
BD Base Offset
0x00
0x02
0x04
0x06
18.7.3 Parameter RAM
The CPM maintains a section of dual-port RAM called the parameter RAM. It contains parameters for
2
USB, SCC, SMC, SPI, I
map.
Offset from IMMR
0x3C00
0x3D00
0x3E00
0x3F00
Freescale Semiconductor
2
C use buffer descriptors (BDs) to define the interface to
Table 18-9. General BD Structure
Status and control
Data length
High-order of buffer pointer
Low-order of buffer pointer
C, and IDMA channel operation.
Table 18-10. Parameter RAM Memory Map
Page Offset from DPRAM_base
1 0x1C00—0x1C7F
0x1C80—0x1CAF
0x1CB0—0x1CBF
0x1CC0—0x1CFF
2 0x1D00—0x1D7F
0x1D80—0x1DAF
0x1DB0—0x1DBF
0x1DC0—0x1DFF
3 0x1E00—0x1E7F
0x1E80—0x1EBF
0x1EC0—0x1EFF
4 0x1F00—0x1F7F
0x1F80—0x1FBF
0x1FC0—0x1FFF
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Table 18-9
Field
Table 18-10 shows the parameter RAM memory
Controller/Peripheral
USB
2
I C default area
Miscellaneous
IDMA1
SCC2
SPI default area
RISC timer table
IDMA2
SCC3
SMC1
Reserved
SCC4
SMC2/PIP
Reserved
Communications Processor
shows the general BD
18-13