Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 365

Powerquicc family
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Table 12-2. MPC875/MPC870 Signal Descriptions (continued)
Hard
Name
Reset
PB[31]
Hi-Z
SPISEL
MII1 - TXCLK
RMII1-REFCL
K
PB[30]
Hi-Z
SPICLK
PB[29]
Hi-Z
SPIMOSI
PB[28]
Hi-Z
SPIMISO
BRGO4
PB[27]
Hi-Z
I2CSDA
BRGO1
PB[26]
Hi-Z
I2CSCL
BRGO2
PB[25]
Hi-Z
SMTXD1
PB[24]
Hi-Z
SMRXD1
PB[23]
Hi-Z
SMSYN1
SDACK1
PB[19]
Hi-Z
RTS4
MII1-RXD3
Freescale Semiconductor
Number
Type
T5
Bidirectional
General-Purpose I/O Port B Bit 31—Bit 31 of the general-purpose
(optional:
I/O port B.
open-drain)
SPISEL—SPI slave select input.
MII1-TXCLK —Media-independent interface 1, transmit clock.
RMII1-REFCLK—Reduced media-independent interface 1,
reference clock.
T17
Bidirectional
General-Purpose I/O Port B Bit 30—Bit 30 of the general-purpose
(optional:
I/O port B.
open-drain)
SPICLK—SPI output clock when it is configured as a master or
SPI input clock when it is configured as a slave.
R17
Bidirectional
General-Purpose I/O Port B Bit 29—Bit 29 of the general-purpose
(optional:
I/O port B.
open-drain)
SPIMOSI—SPI output data when it is configured as a master or
SPI input data when it is configured as a slave.
R14
Bidirectional
General-Purpose I/O Port B Bit 28—Bit 29 of the general-purpose
(optional:
I/O port B.
open-drain)
SPIMISO—SPI input data when the MPC875 is a master; SPI
output data when it is a slave.
BRGO4—BRG4 output clock.
N13
Bidirectional
General-Purpose I/O Port B Bit 27—Bit 27 of the general-purpose
(optional:
I/O port B.
open-drain)
I2CSDA—I
as an open-drain output.
BRGO1—BRG1 output clock.
N12
Bidirectional
General-Purpose I/O Port B Bit 26—Bit 26 of the general-purpose
(optional:
I/O port B.
open-drain)
I2CSCL—I
as an open-drain output.
BRGO2—BRG2 output clock.
U13
Bidirectional
General-Purpose I/O Port B Bit 25—Bit 25 of the general-purpose
(optional:
I/O port B.
open-drain)
SMTXD1—SMC1 transmit data output.
T12
Bidirectional
General-Purpose I/O Port B Bit 24—Bit 24 of the general-purpose
(optional:
I/O port B.
open-drain)
SMRXD1—SMC1 receive data input.
U12
Bidirectional
General-Purpose I/O Port B Bit 23—Bit 23 of the general-purpose
(optional:
I/O port B.
open-drain)
SMSYN1—SMC1 external sync input.
SDACK1—SDMA acknowledge 1 output that is used as a
peripheral interface signal for IDMA emulation, or as a CAM
interface signal for Ethernet.
T11
Bidirectional
General-Purpose I/O Port B Bit 19—Bit 19 of the general-purpose
(optional:
I/O port B.
open-drain)
RTS4—Request to send modem line for SCC4.
MII1-RXD3 —Media-independent interface 1, receive data 3.
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Description
2
C serial data pin. Bidirectional; should be configured
2
C serial clock pin. Bidirectional; should be configured
External Signals
12-35

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