Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 657

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when a high-priority TxBD has been prepared and enough time has passed since the last SCC transmission.

describes TODR fields. This register is affected by HRESET and SRESET.

Transmit on demand.

0 Normal operation

1 The CP gives high priority to the current TxBD and begins sending the frame without waiting the

normal polling time to check TxBD[R]. TOD is cleared automatically after one serial clock, but

transmitting on demand continues until an unprepared (R = 0) BD is reached. TOD does not need

to be set again if new TxBDs are added to the BD table as long as older TxBDs are still being

processed. New TxBDs are processed in order. The first bit of the frame is typically clocked out

5-6 bit times after TOD is set.

Reserved, should be cleared.

SCC Buffer Descriptors (BDs)

Data associated with each SCC is stored in buffers and each buffer is referenced by a buffer descriptor

(BD) that can reside anywhere in dual-port RAM. The total number of 8-byte BDs is limited only by the

size of the dual-port RAM (128 BDs/1 Kbyte). These BDs are shared among all serial controllers—SCCs,

SMCs, SPI, and I

C. The user defines how the BDs are allocated among the controllers.

Each 64-bit BD has the following structure:

The half word at offset + 0x0 contains status and control bits that control and report on the data

transfer. These bits vary from protocol to protocol. The CP updates the status bits after the buffer

is sent or received.

The half word at offset + 0x2 (data length) holds the number of bytes sent or received.

— For an RxBD, this is the number of bytes the controller writes into the buffer. The CP writes

the length after received data is placed into the associated buffer and the buffer closed. In

frame-based protocols (but not including SCC transparent operation), this field contains the

total frame length, including CRC bytes. Also, if a received frame's length, including CRC, is

an exact multiple of MRBLR, the last BD holds no actual data but does contain the total frame

— For a TxBD, this is the number of bytes the controller should send from its buffer. Normally,

this value should be greater than zero. The CP never modifies this field.

The word at offset + 0x4 (buffer pointer) points to the beginning of the buffer in memory (internal

or external).

— For an RxBD, the value must be even.

— For a TxBD, this pointer can be even or odd.

21-6, the format of Tx and Rx BDs is the same in each SCC mode. Only the status and

control bits differ for each protocol.

Freescale Semiconductor

Table 21-4. TODR Field Descriptions

MPC885 PowerQUICC Family Reference Manual, Rev. 2

Serial Communications Controllers