Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 897

Powerquicc family

Table of Contents

Parallel Interface Port (PIP)

Multiplexed through the 18-bit port B parallel I/O, the parallel interface port (PIP) allows data to be sent

to and from the MPC885 over 8 or 16 parallel data lines with two handshake control signals. The PIP

signals are grouped into two sets, PB[24–31] and PB[14–23], allowing the PIP to be configured as an 8-

or 16-bit port. When the PIP is used, SMC2 is not available since they share registers and parameter RAM.

PIP transfers can operate in one of the three following modes:

Handshaking I/O port. Timing attributes, such as setup time and pulse width, are programmable.

Controlled by the CP or the core. There are two handshake options for strobed I/O:

— Two interlocked handshake signals. Supports level-sensitive handshake control signals

compatible with the advanced byte transfer mode of the P1284 protocol; see

"Interlocked Handshake Mode."

— Two pulsed handshake signals. Supports edge-sensitive handshakes like those used for a

Centronics interface; see

Transparent I/O port with one strobe signal. Controlled by the CP only. See

"Transparent Transfers."

The following is a list of the PIP's main features:

Eighteen general-purpose I/O signals

Two handshake modes for strobed I/O

Transparent I/O using a single strobe

Programmable handshake timing attributes

Supports the Centronics receiver/transmitter interface

Supports fast connection between MPC8xx family devices

Can be controlled by the core or CP

Freescale Semiconductor

Section 33.7.2, "Pulsed Handshake Mode."

MPC885 PowerQUICC Family Reference Manual, Rev. 2

Section 33.7.1,

Section 33.8,