Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 821

Table 29-14. SMC Transparent RxBD Field Descriptions (continued)
Bits Name
2 W Wrap (last BD in RxBD table).
0 Not the last BD in the table.
1 Last BD in the table. After this buffer is used, the CP receives incoming data into the first BD that
RBASE points to. The number of RxBDs is determined only by the W bit.
3 I Interrupt.
0 No interrupt is generated after this buffer is filled.
1 SMCE[RX] is set when the CP completely fills this buffer indicating that the core must process
the buffer. The RX bit can cause an interrupt if it is enabled.
4–5 — Reserved, should be cleared.
6 CM Continuous mode.
0 Normal operation.
1 The CP does not clear E after this BD is closed, allowing the buffer to be overwritten when the
CP next accesses this BD. However, E is cleared if an error occurs during reception, regardless
of how CM is set.
7–13 — Reserved, should be cleared.
14 OV Overrun. Set when a receiver overrun occurs during reception. The CP writes OV after the received
data is placed into the buffer.
15 — Reserved, should be cleared.
Data length and buffer pointer fields are described in
29.4.10 SMC Transparent Transmit BD (TxBD)
Data is sent to the CPM for transmission on an SMC channel by arranging it in buffers referenced by the
channel TxBD table. The CP uses BDs to confirm transmission or indicate error conditions so the
processor knows buffers have been serviced.
Figure 29-14 shows the SMC transparent TxBD format.
0 1
Offset + 0 R —
Offset + 2
Offset + 4
Offset + 6
Freescale Semiconductor
2 3 4 5 6
W I L — CM
Tx Buffer Pointer
Figure 29-14. SMC Transparent Transmit BD (TxBD)
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Serial Management Controllers (SMCs)
Description
Section 21.3, "SCC Buffer Descriptors (BDs)."
7
—
Data Length
13 14 15
UN —
29-27