Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 11

Paragraph
Number
6.1.6 Exception Latency ..................................................................................................... 6-18
6.1.7 Partially Completed Instructions ............................................................................... 6-19
7.1 Instruction Cache Organization ....................................................................................... 7-2
7.2 Data Cache Organization ................................................................................................. 7-4
7.3 Cache Control Registers .................................................................................................. 7-6
7.3.1 Instruction Cache Control Registers ............................................................................ 7-6
7.3.1.1 Reading Data and Tags in the Instruction Cache..................................................... 7-8
7.3.1.2 IC_CST Commands................................................................................................. 7-9
7.3.1.2.1 Instruction Cache Enable/Disable Commands .................................................... 7-9
7.3.1.2.2 Instruction Cache Load-and-Lock Cache Block Command................................ 7-9
7.3.1.2.3 Instruction Cache Unlock Cache Block Command ........................................... 7-10
7.3.1.2.4 Instruction Cache Unlock All Command .......................................................... 7-10
7.3.1.2.5 Instruction Cache Invalidate All Command ...................................................... 7-11
7.3.2 Data Cache Control Registers.................................................................................... 7-11
7.3.2.1 Reading Data Cache Tags and Copyback Buffer................................................... 7-14
7.3.2.2 DC_CST Commands ............................................................................................. 7-15
7.3.2.2.1 Data Cache Enable/Disable Commands ............................................................ 7-15
7.3.2.2.2 Data Cache Load-and-Lock Cache Block Command........................................ 7-15
7.3.2.2.3 Data Cache Unlock Cache Block Command..................................................... 7-16
7.3.2.2.4 Data Cache Unlock All Command .................................................................... 7-16
7.3.2.2.5 Data Cache Invalidate All Command................................................................ 7-16
7.3.2.2.6 Data Cache Flush Cache Block Command........................................................ 7-17
7.4 Cache Control Instructions ............................................................................................ 7-17
7.4.1 Instruction Cache Block Invalidate (icbi).................................................................. 7-17
7.4.2 Data Cache Block Touch (dcbt) and
Data Cache BlockTouch for Store (dcbtst) ........................................................... 7-18
7.4.3 Data Cache Block Zero (dcbz) .................................................................................. 7-18
7.4.4 Data Cache Block Store (dcbst) ................................................................................ 7-18
7.4.5 Data Cache Block Flush (dcbf) ................................................................................. 7-19
7.4.6 Data Cache Block Invalidate (dcbi) .......................................................................... 7-19
7.5 Instruction Cache Operations......................................................................................... 7-19
7.5.1 Instruction Cache Hit ................................................................................................. 7-21
7.5.2 Instruction Cache Miss .............................................................................................. 7-21
7.5.3 Instruction Fetching on a Predicted Path ................................................................... 7-21
7.5.4 Fetching Instructions from Caching-Inhibited Regions............................................. 7-22
7.5.5 Updating Code and Memory Region Attributes ........................................................ 7-22
7.6 Data Cache Operation .................................................................................................... 7-22
Freescale Semiconductor
Contents
Title
Chapter 7
Instruction and Data Caches
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Page
Number
xi