Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 106

MPC885 Overview
Instruction
Bus
Embedded
MPC8xx
Processor
Core
Load/Store
Bus
Fast Ethernet
Controller
DMAs
DMAs
FIFOs
10/100
Base-T
Media Access
Control
MIII / RMII
1-8
8-Kbyte
Instruction Cache
Instruction MMU
32-Entry ITLB
8-Kbyte
Data Cache
Data MMU
32-Entry DTLB
Slave / Master IF
4
Parallel I/O
Timers
4 Baud Rate
32-Bit RISC Controller
Generators
Parallel Interface Port
Timers
USB SCC2 SCC3
Time-Slot Assigner
Figure 1-2. MPC885 Block Diagram
MPC885 PowerQUICC Family Reference Manual, Rev. 2
System Interface Unit (SIU)
Unified
Memory Controller
Bus
Internal
Bus Interface
Unit
System Functions
PCMCIA-ATA Interface
Security Engine
Controller
AESU
Channel
Interrupt 8-Kbyte
Controllers Dual-Port RAM
and Program
ROM
SCC4/
SMC1 SMC2
UTOPIA
Serial Interface Serial Interface
External
Bus Interface
Unit
DEU MDEU
Virtual IDMA
and
Serial DMAs
2
SPI
I C
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