Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 274

Powerquicc family
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Memory Management Unit
8.10.1.1
Translation Reload Examples
The following examples reload a TLB entry using a two-level tree page table structure. In both examples,
M_TWB holds the base pointer to the first-level table and data and instruction address translation are
turned off.
Figure 8-23
performs a DTLB reload.
dtlb_swtw
mtspr
mfspr
lwz
mtspr
mfspr
lwz
mtspr
mfspr
rfi
Figure 8-24
performs an ITLB reload.
itlb_swtw
mtspr
mfspr
mtspr
mfspr
lwz
mtspr
mtspr
mfspr
lwz
mtspr
mfspr
rfi
8-32
M_TW, R1
# Save R1
R1, M_TWB
# Load R1 with level-1 pointer
R1, (R1)
# Load level-1 page entry
MD_TWC,R1
# Save level-2 base pointer and level-1 attributes
R1, MD_TWC
# Load R1 with level-2 pointer while taking page
# size into account
R1, (R1)
# Load level-2 page entry
MD_RPN, R1
# Write TLB entry
R1, M_TW
# Restore R1
Figure 8-23. DTLB Reload Code Example
M_TW, R1
# Save R1
R1, SRR0
# Load R1 with instruction miss EA (the same data
# may be taken from MI_EPN)
MD_EPN, R1
# Save instruction miss EA in MD_EPN
R1, M_TWB
# Load R1 with level-1 pointer
R1, (R1)
# Load level-1 page entry
MI_TWC,R1
# Save level-1 attributes
MD_TWC,R1
# Save level-2 base pointer
R1, MD_TWC
# Load R1 with level-2 pointer while taking page
# size into account
R1, (R1)
# Load level-2 page entry
MI_RPN, R1
# Write TLB entry
R1, M_TW
# Restore R1
Figure 8-24. ITLB Reload Code Example
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Freescale Semiconductor

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