Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 528

PCMCIA Interface
16.3 Operation Description
This section describes the operation of memory and I/O cards, interrupt detection and handling, power
control, and reset.
16.3.1 Memory-Only Cards
Table 16-5 lists worst-case conditions of host programming memory cards and assumes WAIT is not used.
If it is, the minimum strobe time is at least 35 ns + 1 system clock.
Memory Access Time
Clock Cycle
20 ns (50 MHz)
30 ns (33.3 MHz)
40 ns (25 MHz)
62 ns (16 MHz)
83 ns (12 MHz)
1
Because the minimum hold time is one clock, the real access time is access time + one clock.
2
Worst-case setup time (STP). The worst-case setup time is address to strobe.
3
Length (LNG) is the minimum strobe time.
4
Worst-case hold time (HLD). The worst-case hold time is data disable from OE.
16.3.2 I/O Cards
Table 16-6 lists worst-case conditions of host programming I/O cards.
Frequency
20 ns (50 MHz)
30 ns (33.3 MHz)
40 ns (25 MHz)
62 ns (16 MHz)
83 ns (12 MHz)
1
Setup time worst-case is for a write. In these cases, setup=data_set_up_before_iord +1 clock.
16-6
Table 16-5. Host Programming for Memory Cards
600 ns
1
LNG
2 4
STP HLD STP
3
100 300 150 30
6 24 8
4 16 5
3 12 4
2 8 3
2 6 2
Table 16-6. Host Programming For I/O Cards
1
STP
60
4
3
3
2
2
MPC885 PowerQUICC Family Reference Manual, Rev. 2
200 ns 150 ns
LNG HLD STP LNG
120 90 20 80
2 8 5 2 6
2 5 3 1 4
1 4 3 1 3
1 2 2 1 2
1 2 2 1 1
LNG
165
8
6
4
3
2
100 ns
HLD STP LNG HLD
75 15 60 50
4 1 4 3
3 1 3 2
2 1 2 2
2 1 1 1
1 1 1 1
HLD
30
2
1
1
1
1
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