Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 665

TCLK
TXD
(Output)
RTS
(Output)
CTS
(Input)
NOTE:
1. GSMR_H[CTSS] = 0. CTSP=0 or no CTS lost can occur.
TCLK
TXD
(Output)
RTS
(Output)
CTS
(Input)
NOTE:
1. GSMR_H[CTSS] = 1. CTSP=0 or no CTS lost can occur.
Note that if GSMR_H[CTSS] = 1, CTS transitions must occur while the Tx clock is low.
Reception delays are determined by CD as shown in
sampled on the rising Rx clock edge before data is received. If GSMR_H[CDS] is 1, CD transitions cause
data to be immediately gated into the receiver.
Freescale Semiconductor
First Bit of Frame Data
CTS Sampled Low Here CTS Sampled High Here
First Bit of Frame Data
Figure 21-11. CTS Lost in Synchronous Protocols
MPC885 PowerQUICC Family Reference Manual, Rev. 2
CTS Lost Signaled in Frame B
Data Forced High
RTS Forced High
CTS Lost Signaled in Frame B
Figure 21-12. If GSMR_H[CDS] is zero, CD is
Serial Communications Controllers
Data Forced High
RTS Forced High
21-19