Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 861

31.10 Endpoint Parameter Block
The map of the endpoint parameter block is shown in
1 2
Offset Name
0x00 RBASE
0x02 TBASE
0x04 RFCR
0x05 TFCR
0x06 MRBLR
0x08 RBPTR
0X0A TBPTR
3
0X0C TSTATE
3
0x10 TPTR
3
0x14 TCRC
3
0x16 TBCNT
0x18 TTEMP
Freescale Semiconductor
Table 31-4. Endpoint Parameter Block
Width
16 bits RxBD/TxBD base addresses. Define the starting location in dual-port RAM for
the USB controller's TxBDs and RxBDs. This provides flexibility in how BDs are
16 bits
partitioned. Setting W in the last BD in each list determines how many BDs to
allocate for the controller's send and receive sides. These entries must be
initialized before the controller is enabled. Overlapping USB BD tables with
another serial controller's BDs causes erratic operation. RBASE and TBASE
values should be divisible by 8.
8 bits Rx/Tx function code. Controls the value to appear on AT[1–3] when the
associated SDMA channel accesses memory and the byte-ordering convention.
8 bits
16 bits Maximum receive buffer length. Defines the maximum number of bytes the
MPC885 writes to the USB receive buffer before moving to the next buffer.
MRBLR must be divisible by 4. The MPC885 can write fewer data bytes to the
buffer than the MRBLR value if a condition such as an error or end-of-packet
occurs, but it never exceeds MRBLR. Therefore, user-supplied buffers should
never be smaller than MRBLR
MRBLR is not designed to be changed dynamically for the currently active RxBD
during USB operation; however, MRBLR can be modified safely for the next and
subsequent RxBDs using a single bus cycle with one 16-bit move (not two 8-bit
bus cycles back-to-back).
Transmit buffers for the USB controller are not affected by the MRBLR value.
Transmit buffer lengths can vary individually, as needed. The number of bytes to
be sent is chosen by programming TxBD[Data Length].
16 bits RxBD pointer. Points to the next BD the receiver will transfer data to when it is in
an idle state or to the current BD while processing a frame. Software should
initialize RBPTR after reset. When the end of the BD table is reached, the CP
initializes this pointer to the value programmed in RBASE. Although the user
does not need to write RBPTR in most applications (except initialization), it can
be changed when the receiver is disabled or when no receive buffer is being
used.
16 bits TxBD pointer. Points to the next BD that the transmitter will transfer data from
when it is in an idle state or to the current BD during frame transmission. TBPTR
should be initialized by the software after reset. When the end of BD table is
reached, the CP initializes this pointer to the value programmed in the TBASEn
entry. Although the user never needs to write TBPTR, in most applications
(except initialization), it can be changed when the transmitter is disabled or when
no transmit buffer is being used.
32 bits Transmit internal state. Reserved for CP use only. Should be cleared before
enabling the USB controller.
32 bits Transmit internal data pointer. Updated by the SDMA channels to show the next
address in the buffer to be accessed.
16 bits Transmit temp CRC. Reserved for CP use only.
16 bits Transmit internal byte count. A down-count value that is initialized with the TxBD
data length and decremented with every byte read by the SDMA channels.
32 bits Tx temp
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Table 31-4.
Description
Universal Serial Bus (USB)
31-13