Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 61

Figure
Number
34-19 Port E Open-Drain Register (PEODR) ............................................................................... 34-22
34-20 Port E Data Register (PEDAT)............................................................................................ 34-23
34-21 Port E Data Direction Register (PEDIR) ............................................................................ 34-23
34-22 Port E Pin Assignment Register (PEPAR) .......................................................................... 34-24
34-23 Port E Special Options Register (PESO) ............................................................................ 34-25
35-1 MPC885 Interrupt Structure.................................................................................................. 35-2
35-2 Interrupt Request Masking.................................................................................................... 35-5
35-3 CPM Interrupt Configuration Register (CICR) .................................................................... 35-7
35-4 CPM Interrupt Pending/Mask/In-Service Registers (CIPR/CIMR/CISR)............................ 35-8
35-5 CPM Interrupt Vector Register (CIVR) .............................................................................. 35-10
36-1 MPC885 Application Example ............................................................................................. 36-6
36-2 Expanded Cell Structure ....................................................................................................... 36-8
36-3 Example PTP Switching Application.................................................................................. 36-12
37-1 Transmit Buffer and TxBD Table Example .......................................................................... 37-2
37-2 AAL0 Buffer Structure.......................................................................................................... 37-3
37-3 ATM RxBD ........................................................................................................................... 37-3
37-4 ATM RxBD in Expanded Cell Mode (UTOPIA Only)......................................................... 37-4
37-5 ATM TxBD ........................................................................................................................... 37-7
37-6 ATM TxBD in Expanded Cell Mode (UTOPIA Only) ......................................................... 37-7
37-7 Connection Tables in Dual-port RAM and External Memory ............................................ 37-11
37-8 Receive Connection Table (RCT) ....................................................................................... 37-12
37-9 PTP Receive Connection Table (PTP RCT)........................................................................ 37-16
37-10 Transmit Connection Table (TCT)...................................................................................... 37-20
37-11 PTP Transmit Connection Table (PTP TCT)....................................................................... 37-24
37-12 TCTE Examples for Internal and External VBR/UBR Channels ....................................... 37-28
37-13 Transmit Connection Table Extension (TCTE) .................................................................. 37-28
38-1 SAR Receive Function Code Register (SRFCR) .................................................................. 38-8
38-2 SAR Receive State Register (SRSTATE).............................................................................. 38-9
38-3 SAR Transmit Function Code Register (STFCR)............................................................... 38-10
38-4 SAR Transmit State Register (STSTATE) .......................................................................... 38-11
38-5 HMASK .............................................................................................................................. 38-12
38-6 FLMASK ............................................................................................................................ 38-13
38-7 APC State Register (APCST).............................................................................................. 38-14
38-8 MPHY State Register (MPHYST) ...................................................................................... 38-15
38-9 ASTATUS ........................................................................................................................... 38-16
39-1 Address Mapping Tables for Internal Channels.................................................................... 39-2
39-2 Address Compression Example ............................................................................................ 39-4
39-3 Management Cell Filtering ................................................................................................... 39-6
39-4 Performance Monitoring Cell Structure (FMCs and BRCs)................................................. 39-8
39-5 FMC Template .................................................................................................................... 39-10
39-6 Function-specific Fields of FMCs, Terminated Cells and Optional BRCs......................... 39-10
Freescale Semiconductor
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Title
MPC885 PowerQUICC Family Reference Manual, Rev. 2
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