Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 707

Powerquicc family
Table of Contents

Advertisement

23.10 SCC HDLC Transmit Buffer Descriptor (TxBD)
The CPM uses the TxBD, shown in
0
1
Offset + 0
R
Offset + 2
Offset + 4
Offset + 6
Figure 23-6. SCC HDLC Transmit Buffer Descriptor (TxBD)
Table 23-8
describes HDLC TxBD status and control fields.
Table 23-8. SCC HDLC TxBD Status and Control Field Descriptions
Bits
Name
0
R
Ready.
0 The buffer is not ready for transmission. Both the buffer and the BD can be updated. The CPM
clears R after the buffer is sent or an error is encountered.
1 The buffer has not been sent or is being sent and the BD cannot be updated.
1
Reserved, should be cleared.
2
W
Wrap (last BD in TxBD table).
0 Not the last BD in the table.
1 Last BD in the BD table. After this buffer is used, the CPM sends data using the BD pointed to by
TBASE. The number of TxBDs in this table is determined by TxBD[W] and the space constraints
of the dual-port RAM.
3
I
Interrupt.
0 No interrupt is generated after this buffer is processed.
1 SCCE[TXB] or SCCE[TXE] is set when this buffer is processed, causing interrupts if not masked.
4
L
Last.
0 Not the last buffer in the frame.
1 Last buffer in the frame.
5
TC
Tx CRC. Valid only when TxBD[L] = 1. Otherwise, it is ignored.
0 Transmit the closing flag after the last data byte. This setting can be used to send a bad CRC after
the data for testing purposes.
1 Transmit the CRC sequence after the last data byte.
6
CM
Continuous mode.
0 Normal operation.
1 The CP does not clear TxBD[R] after this BD is closed allowing the buffer to be resent the next
time the CP accesses this BD. However, TxBD[R] is cleared if an error occurs during
transmission, regardless of CM.
7–13
Reserved, should be cleared.
14
UN
Underrun. Set after the SCC sends a buffer and a transmitter underrun occurred.
15
CT
CTS lost. Indicates when CTS in NMSI mode or layer 1 grant is lost in GCI or IDL mode during frame
transmission. If data from more than one buffer is currently in the FIFO when this error occurs, the
HDLC writes CT in the current BD after sending the buffer.
Freescale Semiconductor
Figure
23-6, to confirm transmissions and indicate error conditions.
2
3
4
5
6
W
I
L
TC
CM
Tx Buffer Pointer
MPC885 PowerQUICC Family Reference Manual, Rev. 2
7
Data Length
Description
SCC HDLC Mode
13
14
15
UN
CT
23-11

Advertisement

Table of Contents
loading

This manual is also suitable for:

Powerquicc mpc870Powerquicc mpc880Powerquicc mpc875

Table of Contents