Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 383

Figure 13-6 demonstrates the basic timing of a single-beat read cycle with one wait state.
CLKOUT
BR
BG
BB
A[0:31]
R/W
TSIZ[0:1], AT[0:3]
BURST
TS
Data
TA
Figure 13-6. Basic Timing: Single-Beat Read Cycle, One Wait State
Freescale Semiconductor
Receive BG and BB negated
Wait State
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Assert BB, drive address and assert TS
External Bus Interface
Data is Valid
13-9