Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 898

Parallel Interface Port (PIP)
Figure 33-1 is a block diagram of the PIP.
33.2 Core Control vs. CP Control
The host-control bit in the PIP configuration register PIPC[HSC] determines whether the PIP transfer is
controlled by the CP or by the core.
33.2.1 Core Control
When the PIP is controlled by the core (PIPC[HSC] = 1), only the interlocked and pulsed handshaking
modes can be used. The CP does not directly participate in the transfer, but an Rx or Tx character event
(RCH or TCH) is flagged in the event register (PIPE). The PIPE is then masked against the PIP mask
register (PIPM); unmasked events interrupt the core.
• When the PIP is configured to receive and STB is asserted on STBI (strobe-in on PB14),
PIPE[RCH] is set to indicate that a character has arrived. When software reads the port B data
register (PBDAT), the PIP asserts ACK through STBO (strobe-out on PB15).
• When the PIP is configured to send and the core writes PBDAT, STB is driven low on STBO
(strobe-out on PB15). When the destination device drives ACK low onto STBI (strobe-in on
PB14), the PIP indicates that a character was successfully sent by flagging PIPE[TCH].
For a core-controlled PIP, only the PIPC, PIPE, PIPM and port B registers need to be configured or
monitored. The PIP parameter RAM and buffer descriptors are not used.
33.2.2 CP Control
When the PIP is controlled by the CP (PIPC[HSC] = 0), any of the three handshake modes can be used.
Data is prepared by the core using PIP buffer descriptors. CP-controlled strobed transfers are the same as
core-controlled transfers described above, except reads and writes to PBDAT are done automatically by
33-2
Peripheral Bus
PIP Data Register
Handshake
Control
Port B Signals
Figure 33-1. PIP Block Diagram
MPC885 PowerQUICC Family Reference Manual, Rev. 2
U-Bus
PIP Configuration Register (PIPC)
Timing Parameters Register (PTPR)
Port B Data Direction (PBDIR)
Port B Pin Assignment Register (PBPAR)
Port B Open Drain Register (PBODR)
PIP Event Register (PIPE)
PIP Mask Register (PIPM)
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