Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 777

Powerquicc family

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Busy condition. Set when a frame is received and discarded due to a lack of buffers.

Tx buffer. Set when a buffer has been sent on the ethernet channel.

Rx buffer. Set when a buffer that was not a complete frame was received on the ethernet channel.

Figure 27-10

shows an example of interrupts that can be generated in ethernet protocol.

Received in ethernet

ethernet SCCE

1. RXB event assumes receive buffers are 64 bytes each.

2. The RENA events, if required, must be programmed in the port C parallel I/O, not in the SCC itself.

3. The RxF interrupt may occur later than RENA due to receive FIFO latency.

Transmitted by ethernet

ethernet SCCE

1. TXB events assume the frame required two transmit buffers.

2. The GRA event assumes a graceful stop transmit command was issued during frame transmission.

3. The TENA or CLSN events, if required, must be programmed in the port C parallel I/O, not in the SCC itself.

P = Preamble, SFD = Start frame delimiter, DA and SA = Source/Destination address,

T/L = Type/Length, D = Data, CR = CRC bytes

Note that the SCC status register (SCCS) cannot be used with the ethernet protocol. The current state of

the RENA and CLSN signals can be found in port C.

Freescale Semiconductor

Table 27-10. SCCE/SCCM Field Descriptions (continued)

Stored in Rx Buffer

Stored in Tx Buffer

Figure 27-10. Ethernet Interrupt Events Example

MPC885 PowerQUICC Family Reference Manual, Rev. 2

SCC Ethernet Mode