Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 827

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29.5.3.2
SMC GCI C/I Channel Reception Process
The SMC receiver continuously monitors the C/I channel. When it recognizes a change in the data and this
value is received in two successive frames, it is interpreted as valid data. This is called the double last-look
method. The CP stores the received data byte in the C/I RxBD and a maskable interrupt is generated. If the
SMC is configured to support SCIT channel 1, the double last-look method is not used.
29.5.4
SMC GCI Commands
The commands in
Table 29-18
Command
Initializes transmit and receive parameters in the parameter RAM to their reset state.
INIT TX AND RX
PARAMETERS
This receiver command can be issued when the MPC885 implements the monitor channel protocol.
TRANSMIT ABORT
When it is issued, the MPC885 sends an abort request on the A bit.
REQUEST
This transmitter command can be issued when the MPC885 implements the monitor channel
TIMEOUT
protocol. It is usually issued because the device is not responding or A bit errors are detected. The
MPC885 sends an abort request on the E bit at the time this command is issued.
29.5.5
SMC GCI Monitor Channel RxBD
The GCI monitor channel RxBD, shown in
channel receive byte. The RxBD itself receives the monitor data.
0
1
Offset + 0
E
L
Table 29-19
describes SMC monitor channel RxBD fields.
Table 29-19. SMC Monitor Channel RxBD Field Descriptions
Bits
Name
0
E
Empty.
0 The CP clears E when the byte associated with this BD is available to the core.
1 The core sets E when the byte associated with this BD has been read.
1
L
Last (EOM). Set when the EOM indication is received on the E bit. Note that when this bit is set, the
data byte is invalid.
2
ER
Error condition. Set when an error occurs on the monitor channel protocol. The error condition
indicates that a new byte was sent before the SMC acknowledged the previous byte.
3
MS
Data mismatch. Set when two different consecutive bytes are received; cleared when the last two
consecutive bytes match. The SMC waits for the reception of two identical consecutive bytes before
writing new data to the RxBD.
Freescale Semiconductor
are issued to CPCR.
Table 29-18. SMC GCI Commands
Figure
2
3
4
ER
MS
Figure 29-16. SMC GCI Monitor Channel RxBD
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Serial Management Controllers (SMCs)
Description
29-16, is used by the CP to report on the monitor
7
8
Description
15
Data
29-33

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