Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 578

Communications Processor
ERAM = 11 ERAM = 10
ERAM = 11
18.7.1 System RAM and Microcode Packages
When optional Freescale-supplied RAM microcode packages are activated, certain portions of the 7-Kbyte
system RAM are no longer available. (The 1-Kbyte parameter RAM is not affected.) Depending on the
memory requirements of the microcode package, some or all of the shaded areas of
locked. Reads to locked areas return all ones. The unshaded 2-Kbyte (non-contiguous) area of system
RAM is always available to the user.
The enable-RAM-microcode field of the RISC configuration register, RCCR[ERAM], selects the three
possible configurations for microcode area sizes—first 512-byte block, first two 512-byte blocks, or first
four 512-byte blocks. When just the first and/or second 512-byte blocks are used for microcode, an
additional 256-byte extension of system RAM is also locked. When all four 512-byte blocks are used for
microcode, an additional 512-byte extension of system RAM is locked. See the darker-shaded areas of
Figure 18-7. In addition to RCCR[ERAM], RMDS[ERAM4K] (enable RAM microcode at offset 4K)
affects the system RAM memory configuration for microcode packages. Setting RMDS[ERAM4K] locks
a 2-Kbyte block and a 512-byte extension (the lighter-shaded areas of
execution.
18-12
0 Kbyte
ERAM = 01
1 Kbyte
2 Kbyte
3 Kbyte
ERAM = 01, 10
4 Kbyte
ERAM4K = 1
5 Kbyte
6 Kbyte
ERAM4K = 1
7 Kbyte
Parameter RAM
8 Kbyte
RCCR[ERAM] governs memory allocation for microcode in dark-shaded areas.
RMDS[ERAM4K] governs memory allocation for microcode in light-shaded areas.
Figure 18-7. Dual-Port RAM Memory Map
MPC885 PowerQUICC Family Reference Manual, Rev. 2
IMMR + 0x2000
BD/Data/Microcode
IMMR + 0x2200
BD/Data/Microcode
IMMR + 0x2400
BD/Data/Microcode
IMMR + 0x2800
BD/Data
IMMR + 0x2E00
BD/Data/Microcode
IMMR + 0x2F00
IMMR + 0x3000
BD/Data/Microcode
IMMR + 0x3800
BD/Data
IMMR + 0x3A00
BD/Data/Microcode
IMMR + 0x3C00
Parameters for the
Peripheral
Controllers
Figure 18-7) for microcode
Figure 18-7 become
Freescale Semiconductor