Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 789

Table 28-7. SCC Transparent RxBD Status and Control Field Descriptions (continued)
Bits Name
5 F First in frame. The transparent controller sets F when this buffer is the first in the frame:
0 Not the first buffer in a frame.
1 First buffer in a frame.
6 CM Continuous mode.
0 Normal operation.
1 The CPM does not clear RxBD[E] after this BD is closed, letting the buffer be overwritten when
the CPM next accesses this BD. However, RxBD[E] is cleared if an error occurs during reception,
regardless of how CM is set.
7 — Reserved, should be cleared.
8 DE DPLL error. Set by the transparent controller when a DPLL error occurs as this buffer is received. In
decoding modes, where a transition is promised every bit, DE is set when a missing transition
occurs. If a DPLL error occurs, no other error checking is performed.
9–10 — Reserved, should be cleared.
11 NO Rx non-octet. Set when a frame containing a number of bits not exactly divisible by eight is received.
12 — Reserved, should be cleared.
13 CR CRC error indication bits. Indicates that this frame contains a CRC error. The received CRC bytes
are always written to the receive buffer. CRC checking cannot be disabled, but it can be ignored.
14 OV Overrun. Indicates that a receiver overrun occurred during buffer reception.
15 CD Carrier detect lost. Indicates when CD is negated during buffer reception.
Data length and buffer pointer fields are described in
Rx buffer pointer must be divisible by four, unless GSMR_H[RFW] is set to 8 bits wide, in which case the
pointer can be even or odd. The buffer can reside in internal or external memory.
28.10 SCC Transparent Transmit Buffer Descriptor (TxBD)
Data is sent to the CPM for transmission on an SCC channel by arranging it in buffers referenced by the
TxBD table. The CPM uses BDs to confirm transmission or indicate error conditions so the processor
knows buffers have been serviced. Prepare status and control bits before transmission; they are set by the
CPM after the buffer is sent.
0 1
Offset + 0 R —
Offset + 2
Offset + 4
Offset + 6
Figure 28-3. SCC Transparent Transmit Buffer Descriptor (TxBD)
Freescale Semiconductor
2 3 4 5 6
W I L TC CM
Tx Buffer Pointer
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Description
Section 21.3, "SCC Buffer Descriptors (BDs)."
7
—
Data Length
SCC Transparent Mode
The
13 14 15
UN CT
28-9