Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 619

20.2.3.7 Programming the SI RAM
Each SI RAM entry determines the routing of the serial bits and the state of strobe outputs for one time
slot. Figure 20-10 shows the format of an SI RAM entry.
0 1
Field LOOP SWTR SSEL4 SSEL3 SSEL2 SSEL1
Reset
R/W
16
Field
Reset
R/W
Table 20-2 describes SI RAM entry fields.
Bits Name
0 LOOP Loop back on this time slot
0 Normal mode (no loopback)
1 Loopback for this time slot
1 SWTR Switch transmit and receive. Valid only in Rx route RAM; ignored in the Tx route RAM. Affects
operation of both L1RXD x and L1TXD x . See
0 Normal operation of L1TXD x and L1RXD x
1 Data is sent on L1RXD x and received from L1TXD x for the duration of this entry. Note that erratic
results may occur if the Tx and Rx sections of the TDM do not use a common clock source.
2–5 SSEL n Strobe select 1–4. The four strobes, L1ST[1–4], can be assigned to the Rx or the Tx RAM and
asserted/negated in sync with the corresponding L1RCLK x or L1TCLK x . Using active-high logic,
each SSEL n will be the value of the corresponding strobe during this time slot. Multiple strobes can
be asserted simultaneously. A strobe can be configured to remain asserted for multiple, consecutive
SI RAM entries; however, if a strobe is asserted on the last entry in the table, the strobe is negated
after the last entry finishes processing.
Notes: The corresponding parallel I/O pins (either port B or C) must be configured for strobe
operation; see
If the same strobe is used in more than one set of entries (in the Rx SI RAM for TDMa and the Tx
SI RAM for TDMb, for example), the assertion of the strobe corresponds to the logical OR of all
possible sources. It is recommended that a given strobe be used in only one set of SI RAM entries.
6 — Reserved, should be cleared.
Freescale Semiconductor
2 3 4 5
Figure 20-10. SIRAM Entry
Table 20-2. SIRAM Field Descriptions
Chapter 34, "Parallel I/O Ports."
MPC885 PowerQUICC Family Reference Manual, Rev. 2
6 7 9 10
— CSEL
0
R/W
—
0
R/W
Description
Figure 20-11 and the accompanying text.
Serial Interface
13 14 15
CNT BYT LST
31
20-13