Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 126

Memory Map
Table 2-1. MPC885 Internal Memory Map (IMMR[14–15]=00) (continued)
Offset
A00 USMOD — USB mode register
A01 USADDR — USB slave address register
A02 USCOM — USB command register
A03 Reserved
A04 USEP0 — USB end point 0 register
A06 USEP1 — USB end point 1 register
A08 USEP2 — USB end point 2 register
A0A USEP3 — USB end point 3 register
A0C–A0F Reserved
A10 USBER — USB event register
A12 Reserved
A14 USBMR — USB mask register
A16 Reserved
A17 USBS — USB status register
A18–A1F Reserved
A20 GSMR_L2—SCC2 general mode register
A24 GSMR_H2—SCC2 general mode register
A28 PSMR2—SCC2 protocol-specific mode register
A2A–A2B Reserved
A2C TODR2—SCC2 transmit on demand register
A2E DSR2—SCC2 data synchronization register
A30 SCCE2—SCC2 event register
A32–A33 Reserved
2-8
Name
Universal Serial Bus (USB)
Serial Communications Controller 2 (SCC2)
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Size Section/Page
8 bits
8 bits
8 bits
8 bits
16 bits
16 bits
16 bits
16 bits
32 bits
16 bits
16 bits
16 bits
8 bits
8 bits
8 bytes
32 bits 21.2.1/21-3
32 bits 21.2.1/21-3
16 bits 21.2.2/21-10
22.16/22-13
25.13.1/25-8 (Asynchronous HDLC)
26.11/26-10
27.17/27-15
28.8/28-7 (Transparent)
16 bits —
16 bits 21.2.4/21-10
16 bits 21.2.3/21-10
16 bits 22.20/22-22
23.11/23-12
25.13.1/25-8 (Asynchronous HDLC)
26.15/26-15
28.12/28-11 (Transparent)
16 bits —
Freescale Semiconductor
(UART)
(BISYNC)
(Ethernet)
(UART)
(HDLC)
(BISYNC)