Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 343

Table 12-1. MPC885/MPC880 Signal Descriptions (continued)
Hard
Name
Reset
BADDR30 Hi-Z
REG
BADDR[28:29] Hi-Z
AS Hi-Z
PA[15] Hi-Z
USBRXD
PA[14] Hi-Z
USBOE
PA[13] Hi-Z
RXD2
PA[12] Hi-Z
TXD2
Freescale Semiconductor
Number Type
A7 Output Burst Address 30—This output duplicates the value of A30 when
the following is true:
• An internal master in the MPC885 initiates a transaction on the
• An asynchronous external master initiates a transaction.
• A synchronous external master initiates a single beat
The memory controller uses BADDR30 to increment the address
lines that connect to memory devices when a synchronous
external master or an internal master initiates a burst transfer.
Register—When an internal master initiates an access to a slave
under control of the PCMCIA interface, this signal duplicates the
value of TSIZ0/REG. When an external master initiates an
access, REG is output by the PCMCIA interface (if it must handle
the transfer) to indicate the space in the PCMCIA card being
accessed.
C5, B5 Output Burst Address—Outputs that duplicate A[28:29] values when one
of the following occurs:
• An internal master in the MPC885 initiates a transaction on the
• An asynchronous external master initiates a transaction.
• A synchronous external master initiates a single beat
The memory controller uses these signals to increment the
address lines that connect to memory devices when a
synchronous external or internal master starts a burst transfer.
D7 Input Address Strobe—Input driven by an external asynchronous
master to indicate a valid address on A[0:31]. The MPC885
memory controller synchronizes AS and controls the memory
device addressed under its control.
N16 Bidirectional General-Purpose I/O Port A Bit 15—Bit 15 of the general-purpose
I/O port A
USBRXD —Receive data. Input to the USB receiver from the
differential line receiver.
P17 Bidirectional General-Purpose I/O Port A Bit 14—Bit 14 of the general-purpose
(optional: I/O port A.
open-drain) USBOE—Output enable. Enables the transceiver to send data
on the bus.
W11 Bidirectional General-Purpose I/O Port A Bit 13—Bit 13 of the general-purpose
I/O port A
RXD2—Receive data input for SCC2
P16 Bidirectional General-Purpose I/O Port A Bit 12—Bit 12 of the general-purpose
(optional: I/O port A
open-drain) TXD2—Transmit data output for SCC2
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Description
external bus.
transaction.
external bus.
transaction.
External Signals
12-13