Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 826

Serial Management Controllers (SMCs)
Table 29-17. SMC GCI Parameter RAM Memory Map (continued)
1
Offset Name
0x04 CI_RxBD
0x06 CI_TxBD
2
0x08 RSTATE
2
0x0C M_RxD
2
0x0E M_TxD
2
0x10 CI_RxD
2
0x12 CI_TxD
1
SMC base = IMMR + 0x3E80 (SMC1), 0x3F80 (SMC2).
2
RSTATE, M_RxD, M_TxD, CI_RxD, and CI_TxD do not need to be accessed by the user in normal operation, and
are reserved for CP use only.
29.5.2 Handling the GCI Monitor Channel
The following sections describe how the GCI monitor channel is handled.
29.5.2.1 SMC GCI Monitor Channel Transmission Process
Monitor channel 0 is used to exchange data with an OSI layer 1 device (reading and writing internal
registers and transferring of the S and Q bits). In SCIT configuration, monitor channel 1 is used for
programming and controlling voice/data modules such as CODECs. The core writes the byte into the
TxBD. The SMC sends the data on the monitor channel and handles the A and E control bits according to
the GCI monitor channel protocol. The
bit states occur on the data line.
29.5.2.1.1 SMC GCI Monitor Channel Reception Process
The SMC receives data and handles the A and E control bits according to the GCI monitor channel
protocol. When the CP stores a received data byte in the SMC RxBD, a maskable interrupt is generated.
A
TRANSMIT ABORT REQUEST
29.5.3 Handling the GCI C/I Channel
The C/I channel is used to control the OSI layer 1 device. The OSI layer 2 device in the TE sends
commands and receives indication to or from the upstream layer 1 device through C/I channel 0. In the
SCIT configuration, C/I channel 1 is used to convey real-time status information between the layer 2
device and nonlayer 1 peripheral devices (CODECs).
29.5.3.1 SMC GCI C/I Channel Transmission Process
The core writes the data byte into the C/I TxBD and the SMC transmits the data continuously on the C/I
channel to the physical layer device.
29-32
Width
Hword C/I channel RxBD. See
Hword C/I channel TxBD. See
Word Rx/ Tx Internal State
Hword Monitor Rx Data
Hword Monitor Tx Data
Hword C/I Rx Data
Hword C/I Tx Data
command resolves deadlocks when errors in the A and E
TIMEOUT
command causes the MPC885 to send an abort request on the E bit.
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Description
Section 29.5.7, "SMC GCI C/I Channel RxBD."
Section 29.5.8, "SMC GCI C/I Channel TxBD."
Freescale Semiconductor