36.3
ATM Features
The MPC885 supports the following features:
•
Serial ATM capability on the SCCs
•
Optional UTOPIA port using SCC4
•
Cell processing up to 96 Mbps aggregate receive and transmit via UTOPIA interface (with 80 MHz
system clock)
•
Cell processing up to 32 Mbps aggregate receive and transmit via serial interface (with 80 MHz
system clock)
•
Memory-to-memory cell processing (via UTOPIA or serial interface with internal loopback). This
allows direct memory-to-memory segmentation and reassembly.
•
Performs transmission convergence (TC) to E1/T1/xDSL serial lines
•
Management (OAM) (operation administration & maintenance) cell filtering or monitoring based
on segment or end-to-end indication
•
OAM performance monitoring (PM)
•
Support of AAL0 and AAL5 protocols on a per virtual circuit (VC) basis
•
AAL0 support allows other AAL types to be implemented in application software.
•
AAL2 support.
•
Support for 32 active VCs using internal dual-port RAM, and up to 64K using external memory
•
Flexible and efficient cell rate pacing support for CBR, VBR and UBR, with software hooks
provided for host-managed ABR services
•
Supports UTOPIA and serial (E1/T1) interfaces
•
Compliant with ATM Forum UNI 4.0 specification
•
CLP and congestion indication marking in RxBD
•
Dynamic CLP and congestion marking in TxBD
•
Separate transmit and receive buffer descriptor (BD) tables for each channel
•
Support for VP forwarding by aggregating multiple Port-To-Port receivers into one transmitter
•
Interrupt reporting optionally enabled per channel
•
Supports 53-byte to 65-byte (expanded) ATM cell size
•
Optional statistical cell counters per PHY
•
Glueless serial interface
•
Supports AAL5 connections:
— Reassembly:
– Reassembles CPCS_PDU directly to host memory
– CRC32 check
– CPCS_PDU padding removal
– CS_UU, CPI, and LENGTH reporting
– CLP and congestion reporting
– Interrupt per buffer or per frame
Freescale Semiconductor
MPC885 PowerQUICC Family Reference Manual, Rev. 2
ATM Overview
36-3