Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 857

controller for each token. Tokens are not checked for validity and are transmitted as is. The user is
responsible for token validity as well as CRC5 generation. Low speed transactions start with a preamble
which is generated by the USB host controller state machine when the LSP bit in the token TxBD is set.
The signalling on the USB lines is controlled by LSS in USMOD.
The SOF transaction is initiated and generated using a CPM timer and a microcode routine. Once the SOF
token is loaded to the host FIFO, it is transmitted as is.
When the TEST bit is programmed in the USMOD register, both the host state machine and the function
state machine are active. Endpoints 1-3 receive/transmit data according to tokens received from host. The
programming model and functional description are as described in
Programming Model."
Freescale Semiconductor
Full
Speed
SETUP
token
OUT
token
setup
transmit
Figure 31-5. USB Controller Operating Modes
MPC885 PowerQUICC Family Reference Manual, Rev. 2
reset
IDLE
Low Speed
PREAMBLE
IN
token
receive
Section 31.11, "USB Function
Universal Serial Bus (USB)
31-9