Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 263

0
Field
Reset
R/W
16 17
Field RPN
Reset
R/W
SPR
Figure 8-12. DMMU Real Page Number Register (MD_RPN)
Table 8-13 describes MD_RPN fields.
protection modes.)
Bits Name
0–19 RPN Real (physical) page number
20–21 PP Protection attributes for
subpages 1–4.
Supervisor User
00 No access
01 R/W
10 R/W
11 R/W
1
22 PP
23
24–27
28 SPS Small page size. Used with the level-one (L1) descriptor's page-size (PS) field; see
"Page Size."
0 4 Kbyte
1 16 Kbyte or larger (512 Kbyte or 8 Mbyte)
29 SH Shared page
0 This entry matches only if the ASID field in the DTLB entry matches the M_CASID value.
1 ASID comparison is disabled for the entry.
Freescale Semiconductor
18 19 20
(Section 8.5, "Protection Resolution Modes,"
Table 8-13. MD_RPN Field Descriptions
Mode 2
Extended Encoding:
Supervisor
00 No access
No access 01 R/O
No access 1x Reserved
R/O
R/W
0 Bits 20–21 contain basic encoding
1 Bits 20–21 contain extended encoding
Change bit for DTLB entry. Set to 1 by default if change tracking
functionality is not desired.
0 Unchanged region. Write access causes an IMMU exception.
Software should take an appropriate action before setting this bit.
1 Changed region. Write access is allowed to this page.
MD_CTR[PPCS] = 0
For 1-Kbyte pages in mode 3, set
to the appropriate subpage
validity. Otherwise, set to
0b1111.
MPC885 PowerQUICC Family Reference Manual, Rev. 2
RPN
—
R/W
27
PP
—
R/W
798
Mode 1 or Mode 3
Basic Encoding:
User Supervisor
No access 00 R/W
No access 01 R/W
10 R/W
11 R/O
MD_CTR[PPCS] = 1
1000 Hit only for supervisor
accesses
0100 Hit only for user accesses
1100 Hit for both
Memory Management Unit
15
28 29 30 31
SPS SH CI V
describes the
User
No access
R/O
R/W
R/O
Section 8.7.3,
8-21