Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 418

Clocks and Power Control
MODCK[1:2]
EXTCLK
XTAL Main
Clock
EXTAL
Oscillator
Note that only CLKOUT is an actual external output; all other outputs are internal signals.
14-2
PLPRCR[PDF, MFI, MFN, MFD]
DPLL
1
dpdref
2 x MFI +
––––––
(PDF +1)
osclk
2:1
MUX
2:1 MUX
(÷4 OR ÷16)
tbclk
SCCR[PTSEL]
2:1
MUX
OSCM
÷512
Figure 14-1. Clock Source and Distribution
MPC885 PowerQUICC Family Reference Manual, Rev. 2
VDDSYN
PLPRCR[S]
Interface
MFN
dpgdck
______
Logic
MFD+1
(divide
by 1, 2, 4)
divout1
Low-Power
Dividers
Clock
Drivers
SCCR
[TBS]
CLKOUT
Driver
Time Base and
Decrementer
Driver
SCCR[PTDIV]
÷4
PIT
2:1
Clock
MUX
and Driver
jdbck
÷2
gclk2
gclk/
gclk2
gclk1c/
gclk2c
gclk1_50/
gclk2_50
utpclk
brgclk
syncclk
CLKOUT
tmbclk
pitclk
Freescale Semiconductor