Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 854

Powerquicc family

Table of Contents

Universal Serial Bus (USB)

Reception begins when an OUT token is received. The USB controller fetches the next BD associated

with the endpoint; if the BD is empty, the controller starts sending the incoming packet to the buffer. After

the buffer is full, the USB controller clears RxBD[E] and generates an interrupt if RxBD[I] = 1. If the

incoming packet is larger than the buffer, the USB controller fetches the next BD, and, if it is empty, sends

the rest of the packet to its buffer. The entire packet, including the DATA0/DATA1 PID, is written to the

receive buffers. Software must check data packet synchronization by monitoring the DATA0/DATA1 PID

sequence toggle.

If the packet reception has no CRC or bit stuff errors, the USB receiver sends the handshake selected

in the endpoint configuration register USEP n [RHS] (see table below) to the host. If an error occurs, no

handshake packet is returned and error status bits are set in the last RxBD associated with this packet.

unenumerated

Figure 31-3. USB Controller Operating Modes

Table 31-2. USB Tokens

USEP n [RHS]

MPC885 PowerQUICC Family Reference Manual, Rev. 2

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USB Out Token Reception

Data Packet Corrupted Handshake Sent to Host

None (Data Discarded)

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