Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 943

34.6.2 Port E Special Options Register (PESO)
The port E special options (PESO) register, shown in
peripherals along with PEDIR register.
0 1 2
Field
Reset — — —
R/W
Addr
16 17 18
Field SO16 SO17 SO18 SO19 SO20 SO21 SO22 SO23 SO24 SO25 SO26 SO27 SO28 SO29 SO30 SO31
Reset 0 0 0
R/W R/W R/W R/W
Addr
This register is affected by HRESET but is not affected by SRESET.
Bits Name
0–13 — Reserved
14 –31 SO n Port E Special Options. If the port E signal is configured as peripheral function, the SO bit
configures further the on-chip peripheral
0 Select the signals for the first choice of the on-chip peripheral
1 Select the signals for the second choice of the on-chip peripheral
Freescale Semiconductor
3 4 5 6
—
— — — —
—
19 20 21 22
0 0 0 0
R/W R/W R/W R/W
Figure 34-23. Port E Special Options Register (PESO)
Table 34-27. PESO Bit Descriptions
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Table 34-23 below, further configures the on-chip
7 8 9 10 11
— — — — —
0xAD0
23 24 25 26 27
0 0 0 0
R/W R/W R/W R/W R/W
0xAD2
Table 34-27
Description
Parallel I/O Ports
12 13 14 15
SO14 SO15
— — 0 0
R/W R/W
28 29 30 31
0 0 0 0 0
R/W R/W R/W R/W
describes PESO bits.
34-25