Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 963

Chapter 36
ATM Overview
The MPC885 provides enhanced ATM functionality over that of the MPC860SAR. The MPC885 adds
major new features available in "enhanced SAR" (ESAR) mode, including the following:
• Improved operation administration and maintenance (OAM) support
• OAM performance monitoring (PM)
• Multiple APC priority levels available to support a range of traffic pace requirements
• Port-to-port switching, without the need to download microcode
• Simultaneous MII (100Base-T) and UTOPIA (half or full -duplex) capability
• Optional statistical cell counters per PHY
• UTOPIA level 2 compliant interface with added FIFO buffering to reduce the total cell
transmission time. (The earlier UTOPIA level 1 specification is also supported.)
• Parameter RAM for both SPI and I
• Supports full-duplex UTOPIA master (ATM side) and slave (PHY side) operation using UTOPIA
split bus mode
• AAL2/VBR functionality is ROM-resident
36.1 ATM Capabilities
The MPC885 can be used as an adaptable ATM controller suited for a variety of applications, including
the following:
• ATM line card controllers
• ATM to WAN interworking, including frame relay, T1/E1 circuit emulation service (CES), and
xDSL applications
• Residential broadband network interface units (ATM-to-Fast Ethernet)
• Set-top controllers
• ATM25 applications
• Bridging and routing applications
36.2 MPC885 and MPC860 Differences
As an ATM Controller, the MPC885 is functionally the same as the standard MPC860. However, when
running an ATM application, the MPC885 does use different pin multiplexing or loses some functionality
depending on the ATM mode chosen.
Freescale Semiconductor
2
C can be relocated without RAM-based microcode
MPC885 PowerQUICC Family Reference Manual, Rev. 2
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