Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 559

Powerquicc family

Table of Contents

is a block diagram of the CPM timers.

Global Configuration Register

Timer Counter (TCN)

Reference Register (TRR)

Capture Register (TCR)

The following list summarizes the main features of the CPM timers:

Maximum period of 10.7 seconds (at 25 MHz)

40-ns resolution (at 25 MHz)

Programmable sources for the clock input

Input capture capability

Output compare with programmable mode for the output pin

Timers are cascadeable to form 32-bit timers

Free run and restart modes

Timer 1 is used with the PCMCIA speaker inputs to generate alerts on SPKROUT.

CPM Timer Operation

The following subsections describe the timer operation. The timer mode registers (TMRx) and the timer

global configuration register (TGCR) mentioned in this section are described in

Timer Register Set."

Freescale Semiconductor

Event Register

Mode Register

Figure 17-3. CPM Timer Block Diagram

MPC885 PowerQUICC Family Reference Manual, Rev. 2

Communications Processor Module and CPM Timers

System Clock

Section 17.2.3, "CPM