Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 931

5. Write the signal value using the PCDAT register.
The following steps can be taken to configure a port C signal as a general-purpose input signal that does
not generate an interrupt:
1. Write the corresponding PCPAR bit with a zero.
2. Write the corresponding PCDIR bit with a zero.
3. Write the corresponding PCSO bit with a zero.
4. The corresponding PCINT bit is a 'don't care' bit.
5. Write the corresponding CIMR bit with a zero to prevent interrupts from being generated to the
core.
6. Read the signal value using the PCDAT register.
When a port C signal is configured as a general-purpose I/O input, a change in the port C interrupt register
(PCINT) causes an interrupt request signal to be sent to the CPIC. Each port C signal can be configured to
assert an interrupt request either when a high-to-low change occurs or when any change occurs. Each port
C signal asserts a unique interrupt request to the CPM interrupt pending register (CIPM) (see
Section 35.5.2, "CPM Interrupt Pending Register
level within the CPM interrupt controller (see
Requests can be masked independently in the CPM interrupt mask register (CPMR). See
"CPM Interrupt Mask Register."
that generates an interrupt:
1. Write the corresponding PCPAR bit with a 0.
2. Write the corresponding PCDIR bit with a 0.
3. Write the corresponding PCSO bit with a 0.
4. Set the PCINT bit to determine which edges cause interrupts.
5. Write the corresponding CIMR bit with a 1 so that interrupts can be sent to the core.
6. Read the signal value using the PCDAT register.
The port C signals associated with CDx and CTSx have a mode of operation in which the signal can be
connected to the SCC internally but can also generate interrupts. Port C still detects changes on CTS and
CD and asserts the corresponding interrupt request, but the SCC simultaneously uses CTS and/or CD to
control operation automatically. This allows the implementation of V.24, X.21, and X.21 bis protocols with
help from other general-purpose I/O signals. To configure a port C signal as a CTS or CD signal that
connects to the SCC and generates interrupts, follow these steps:
1. Write the corresponding PCPAR bit with a 0.
2. Write the corresponding PCDIR bit with a 0.
3. Write the corresponding PCSO bit with a 1.
4. Set the PCINT bit to determine which edges cause interrupts.
5. Write the corresponding CIMR bit with a 1 so that interrupts can be sent to the core.
6. The signal value can be read at any time using the PCDAT register.
Freescale Semiconductor
(CIPR)") and has a different internal interrupt priority
Section 35.2, "CPM Interrupt Source
The following steps configure a port C signal as a general-purpose input
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Parallel I/O Ports
Priorities").
Section 35.5.3,
34-13