Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 630

Serial Interface
20.2.4.4 SI Command Register (SICMR)
The SI command register (SICMR) is used to swap the SI RAM routing. SICMR commands are valid only
when the SI RAM is partitioned for dynamic changes; that is, when SIGMR[RDM] = 0b01 or 0b11. See
Section 20.2.3.4, "SI RAM Dynamic Changes."
0
Field CSRRa
Reset
R/W
Addr
This register is affected by HRESET and SRESET.
Bits Name
0, 2 CSRR x Change shadow RAM for TDM x receiver/transmitter. Set by the user; cleared by the SI when the
swap completes.
1, 3 CSRT x
0 The shadow RAM is invalid. The shadow RAM can be written to program a new routing.
1 The shadow RAM is valid. The SI swaps the RAMs, taking the new routing from the shadow
RAM.
4–7 — Reserved, should be cleared.
20.2.4.5 SI Status Register (SISTR)
The SI status register (SISTR) indicates which part of the SI RAM is the current-route RAM. The value
of SISTR is valid only when the corresponding SICMR bit is clear.
0
Field CRORa
Reset
R/W
Addr
This register is affected by HRESET but is not affected by SRESET.
fields.
20-24
1 2
CSRTa CSRRb CSRTb
Figure 20-21. SI Command Register (SICMR)
Table 20-7. SICMR Field Descriptions
1 2
CROTa CRORb CROTb
Figure 20-22. SI Status Register (SISTR)
MPC885 PowerQUICC Family Reference Manual, Rev. 2
3 4
0
R/W
0xAE7
Table 20-7 describes the SICMR fields.
Description
3 4
0
R
OxAE6
Table 20-8
7
—
7
—
describes the SISTR
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