Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 401

When the internal on-chip arbiter is used, BG is an output from the internal arbiter to the external bus
master. When configured for external central arbitration, BG is an input to the MPC885 from the external
arbiter.
13.4.6.3 Bus Busy (BB)
BB indicates that the current master is using the bus. New masters should not begin a transfer until BB is
deasserted. The bus master should not relinquish or negate BB until it completes its transfer. To avoid
contention on BB, masters should three-state BB when it gets a logical 1 value. This situation implies an
external pull-up resistor is needed to ensure that a master that acquires the bus can recognize the negation
of BB, regardless of how many cycles have passed since the previous master relinquished the bus. See
Figure 13-22.
MPC885
Figure 13-22. Bus Busy (BB) and Transfer Start (TS) Connection Example
Freescale Semiconductor
External Bus
TS
BB
Slave 2
MPC885 PowerQUICC Family Reference Manual, Rev. 2
External Bus Interface
Master
13-27